An active matrix display means the display uses transistors as switches of pixels. For example, of current displays, the structure of the active matrix display is most extensively used in a thin film transistor liquid crystal display (TFT LCD). The active matrix display comprises a display area of the display, a gate driver circuit, a source driver circuit, and a timing control circuit.
The display area of the display uses the electro-optical property of a certain material to convert an electrical signal to an optical image. The gate driver circuit, also called the scan driver circuit, is used to transmit the on or off signals of the transistors in the display. The source driver circuit, also called the data driver circuit, is used to convert a digital signal to an analog voltage to transmit the image signal to the display. The timing control circuit is used to generate the control signal needed by the gate driver and the source driver. Then, the image signal will be transmitted to the display by the gate driver and the source driver.
For the time being, the structure of the digital-to-analog converter in a conventional source driver is illustrated in FIG. 1. Taking n bits to stand for 2n grey levels as an example, the digital-to-analog converter 100 (DAC 100) in a conventional source driver is composed of 2n switches. Each switch supplies an analog voltage, and the voltage is output from an output buffer 101 to drive a display.
Complex decoders are needed in the design to decode the digital signal to determine the output reference voltage corresponding to the digital signal. Additionally, as illustrated in FIG. 1, addition of one more gray level requires one more switch and one more reference voltage in the DAC 100. With the demands of higher color resolution in displays, more gray levels and switches are needed. Thus, the size of the chip becomes bigger, and the cost to manufacture the source driver also becomes higher.
FIG. 2 illustrates the structure of the digital-to-analog converter in another conventional source driver. In the digital-to-analog converter 200 (DAC 200), every two switches form a switch set, and a plurality of switch sets form a plurality of orders. Each order corresponds to each bit of the digital signal by one-to-one, and each switch of every switch set is controlled by the bit and the complement corresponding to each order. Bus lines supply different reference voltages, and by the different combination of the switches of each order, different voltages will be output to the output buffer 201.
Reference is made to FIG. 2. The source driver transmits an n bit signal 202,in which Bn-1 is the most significant bit and B0 is the least significant bit. Taking the signal with 5 bits as an example, when B0=B1=B2=B3=B4=1, the reference voltage of V32 is output to the output buffer 201, and the value represented thereby is 31. When B0=0 (i.e. its complement B0B=1) and B1=B2=B3=B4=1, the reference voltage of V31 is output to the output buffer 201, and the value represented thereby is 30. No complex decoders are needed in the design to decode the digital signal to determine the output reference voltage corresponding to the digital signal. Therefore, the decoder in the DAC 200 is simpler than that in the DAC 100 in FIG. 1.
Table 1 lists the comparison of the amount of the switches and reference voltages in the DAC 100 in FIG. 1 and the DAC 200 in FIG. 2. From Table 1, although the decoder in the DAC 200 in FIG. 2 is simpler than that in the DAC 100 in FIG. 1, more switches are needed in DAC 200 than in DAC 100.
TABLE 1The amount ofTheTheThe decodersreferenceamount ofamount ofof switchesvoltagesbus linesswitchesDAC 100 inComplex2n2n2nFIG. 1DAC 200 inSimple2n2n2n+1FIG. 2
As can be seen from the table above, in the structure of the digital-to-analog converter in conventional source drivers, when the demands for higher color resolution in displays is higher, the needed switches, reference voltages, and the bus lines supplying reference voltages are doubled exponentially with the increase of the bits.